Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
"Nuno Louren�o, Ricardo Martins, Nuno Horta"
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects - Springer 2017
978-3-319-42037-0
"Engineering; Circuits and Systems; Processor Architectures; Electronics and Microelectronics, Instrumentation"
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects - Springer 2017
978-3-319-42037-0
"Engineering; Circuits and Systems; Processor Architectures; Electronics and Microelectronics, Instrumentation"