Formal Verification of Simulink/Stateflow Diagrams
"Naijun Zhan, Shuling Wang, Hengjun Zhao"
Formal Verification of Simulink/Stateflow Diagrams - Springer 2017
978-3-319-47016-0
Engineering; Circuits and Systems; Processor Architectures; Electronic Circuits and Devices
Formal Verification of Simulink/Stateflow Diagrams - Springer 2017
978-3-319-47016-0
Engineering; Circuits and Systems; Processor Architectures; Electronic Circuits and Devices