MARC details
| 000 -LEADER |
|---|
| fixed length control field |
02556nam a22002177a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20200303151239.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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| fixed length control field |
200303b ||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9781489995001 |
| 040 ## - CATALOGING SOURCE |
|---|
| Transcribing agency |
VITAP |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Edition number |
23rd |
| Classification number |
621.392 SPE |
| 100 ## - MAIN ENTRY--PERSONAL NAME |
|---|
| 9 (RLIN) |
8897 |
| Personal name |
Spear, Chris |
| 245 ## - TITLE STATEMENT |
|---|
| Title |
System Verilog for Verification : |
| Remainder of title |
A Guide to Learning the Testbench Language Features / |
| Statement of responsibility, etc. |
Chris Spear and Greg Tumbush |
| 250 ## - EDITION STATEMENT |
|---|
| Edition statement |
3rd Ed. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
New York, USA |
| Name of publisher, distributor, etc. |
Springer+Business Media, LLC, |
| Date of publication, distribution, etc. |
2012 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xliii, 464p. : ill. ; |
| Dimensions |
24cm |
| 500 ## - GENERAL NOTE |
|---|
| General note |
It includes References and Index Pages.<br/><br/>Based on the highly successful second edition, this extended edition of SystemVerilog for Verification: A Guide to Learning the Testbench Language Features teaches all verification features of the SystemVerilog language, providing hundreds of examples to clearly explain the concepts and basic fundamentals. It contains materials for both the full-time verification engineer and the student learning this valuable skill.<br/><br/>In the third edition, authors Chris Spear and Greg Tumbush start with how to verify a design, and then use that context to demonstrate the language features, including the advantages and disadvantages of different styles, allowing readers to choose between alternatives. This textbook contains end-of-chapter exercises designed to enhance students’ understanding of the material. Other features of this revision include:<br/><br/>New sections on static variables, print specifiers, and DPI from the 2009 IEEE language standard<br/>Descriptions of UVM features such as factories, the test registry, and the configuration database<br/>Expanded code samples and explanations<br/>Numerous samples that have been tested on the major SystemVerilog simulators<br/>SystemVerilog for Verification: A Guide to Learning the Testbench Language Features, Third Edition is suitable for use in a one-semester SystemVerilog course on SystemVerilog at the undergraduate or graduate level. Many of the improvements to this new edition were compiled through feedback provided from hundreds of readers.<br/><br/> |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| 9 (RLIN) |
8898 |
| Topical term or geographic name entry element |
Integrated circuits—Verification; Verilog (Computer hardware description language); Object-oriented programming (Computer science); Computer hardware description languages; Engineering; Systems engineering; Computer-aided design; SystemVerilog (Computer hardware description language) |
| 700 ## - ADDED ENTRY--PERSONAL NAME |
|---|
| 9 (RLIN) |
8900 |
| Personal name |
Tumbush, Greg |
| 856 ## - ELECTRONIC LOCATION AND ACCESS |
|---|
| Uniform Resource Identifier |
<a href="https://www.springer.com/in/book/9781461407140">https://www.springer.com/in/book/9781461407140</a> |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
Dewey Decimal Classification |
| Koha item type |
Reference Book |
| Classification part |
621.392 SPE |
