Zainalabedin Navabi <br/><br/>
Verilog Digital System Design:  Register Transfer Level Synthesis, Testbench, and Verification 

 - 2nd ed. 
 - New Delhi  McGraw Hill Education (India) Private Limited  2014 
 - xvi, 384p.  With CD 
<br/><br/> It includes index, glossary. 
<br/><br/><label>ISBN: </label>9780070252219 
<br/><br/><label>Dewey Class. No.: </label>621.392