"Naijun Zhan, Shuling Wang, Hengjun Zhao" <br/><br/>
Formal Verification of Simulink/Stateflow Diagrams 

 -  Springer  2017 
<br/><br/><label>ISBN: </label>978-3-319-47016-0 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Engineering; Circuits and Systems; Processor Architectures; Electronic Circuits and Devices