000 00593nam a2200145Ia 4500
008 210311s9999 xx 000 0 und d
020 _a978-3-319-42037-0
100 _a"Nuno Louren�o, Ricardo Martins, Nuno Horta"
245 0 _aAutomatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
260 _bSpringer
260 _c2017
650 _a"Engineering; Circuits and Systems; Processor Architectures; Electronics and Microelectronics, Instrumentation"
856 _uhttp://link.springer.com/openurl?genre=book&isbn=978-3-319-42037-0
942 _cEBOOK
999 _c36955
_d36955