| 000 | 00527nam a2200145Ia 4500 | ||
|---|---|---|---|
| 008 | 210311s9999 xx 000 0 und d | ||
| 020 | _a978-3-319-47016-0 | ||
| 100 | _a"Naijun Zhan, Shuling Wang, Hengjun Zhao" | ||
| 245 | 0 | _aFormal Verification of Simulink/Stateflow Diagrams | |
| 260 | _bSpringer | ||
| 260 | _c2017 | ||
| 650 | _aEngineering; Circuits and Systems; Processor Architectures; Electronic Circuits and Devices | ||
| 856 | _uhttp://link.springer.com/openurl?genre=book&isbn=978-3-319-47016-0 | ||
| 942 | _cEBOOK | ||
| 999 |
_c36957 _d36957 |
||