| 000 | 00676nam a22001937a 4500 | ||
|---|---|---|---|
| 005 | 20250322093358.0 | ||
| 008 | 250322b |||||||| |||| 00| 0 eng d | ||
| 020 | _a9781119481515 | ||
| 040 | _cVITAP | ||
| 082 |
_223 _a621.39732 BAK |
||
| 100 |
_aBaker, R. Jacob _915408 |
||
| 245 |
_aCMOS: Circuit Design, Layout, And Simulation _c/ R. Jacob Baker |
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| 250 | _a4th | ||
| 260 |
_aNew Jersey _bIEEE Press _c2019 |
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| 300 | _axxxv,1235p.: ill.: 28cm | ||
| 500 | _aIt include index pages | ||
| 650 | 0 |
_aTransistor-Level Design Techniques, Phase-Locked and Delay-Locked Loops, Mixed-Signal Circuits and Data Converters, Circuit Noise Analysis etc. _915409 |
|
| 942 |
_2ddc _cBK |
||
| 999 |
_c46517 _d46517 |
||