000 00664nam a22001697a 4500
005 20251023123623.0
008 251023b |||||||| |||| 00| 0 eng d
040 _cVITAP
082 _223rd Ed.
_a621.384 SRI
100 _aSri Lakshmi, Sangam
_916367
245 _aApplication of Non-Aligned Double Gate Transistors in Circuit Design of Logic Gates
_c/ Sangam Sri Lakshmi
260 _aAmaravathi
_bVIT-AP University
_c2025
300 _axvi, 115p. : ill. ; 29cm
650 0 _aDelay; Short Channel Effects; EDP; PDP; Power Dissipation; Digital gates; XOR; NAND; NOR; Transconductance
_916368
700 _aDr. Arun Kumar Sinha
_916369
_eGuide
942 _2ddc
_cTHESIS
999 _c46959
_d46959