Course reserves for VLSI Verification Methodologies

  1. Department: Electronics
  2. Course number: ECE6002
  3. Instructors:
Title Author Item type Location Collection Call number Copy number Status Date due Notes Link
System Verilog for Verification : Spear, Chris Reference Book VIT-AP
General Stacks
Reference 621.392 SPE Available ECE Record URL
Hardware Verification with SystemVerilog : Mintz, Mike Reference Book VIT-AP
General Stacks
621.392 MIN Available ECE Record URL
ASIC/SoC Functional Design Verification : Mehta, Ashok B. Text Book School of Electronics Section
General Stacks
621.3815 MEH Available ECE Record URL
Writing Testbenches : Functional Verification of HDL Models / Bergeron, Janick Text Book VIT-AP
General Stacks
621.392 BER Checked out 2024-10-03 ECE Record URL

Visitor Number:

Powered by Koha