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Hardware Verification with SystemVerilog : An Object-Oriented Framework / Mike Mintz and Robert Ekendahl

By: Mintz, Mike.
Contributor(s): Ekendahl, Robert.
Material type: TextTextPublisher: New York Spriner Science+Business Media Inc. 2010Description: xxii, 314p. : ill. ; 25cm.ISBN: 9781441944085.Subject(s): Object-oriented programming (Computer science); Verilog (Computer hardware description language); Integrated circuits—Verification; Systems engineering; Computer engineering; Computer science; Computer-aided design; EngineeringDDC classification: 621.392 MIN Online resources: Click here to access online
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General Stacks 		621.392 MIN (Browse shelf) Not For Loan (Restricted Access) ECE 019013

HDL Verification and Methodology

VLSI Verification Methodologies

Browsing School of Electronics Section Shelves , Shelving location: General Stacks Close shelf browser
621.392 BHA VERILOG HDL Primer 621.392 BHA VERILOG HDL Primer 621.392 BHA VERILOG HDL Primer 621.392 MIN Hardware Verification with SystemVerilog : 621.392 PAL Verilog HDL 621.392 PAL Verilog HDL 621.392 PAL Verilog HDL

It includes index

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