TY  - BOOK
AU  - Mehta, Ashok B.
TI  - ASIC/SoC Functional Design Verification : : A Comprehensive Guide to Technologies and Methodologies 
SN  - 9783319594170
U1  - 621.3815 MEH 23rd
PY  - 2018///
CY  - Netherland
PB  - Springer International Publishing AG
KW  - Logic design; Microprocessors; Electronic circuits; Integrated circuits—Verification; SystemVerilog (Computer hardware description language); Application-specific integrated circuits—Design; Systems on a chip--Design and construction
N1  - It includes bibliography and index pages

Introduction
This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon The author outlines all of the verification sub-fields at a high level, with just enough depth to allow a manager/decision maker or an engineer to grasp the field which can then be pursued in detail with the provided references. He describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, Reuse Methodology from Algorithm/ESL to RTL, and other overall methodologies.
Keywords
System-on-Chip design System-on-Chip verification Functional hardware verification SystemVerilog Assertions SystemVerilog Functional Coverage Assertion Based Verifiction
UR  - https://link.springer.com/book/10.1007/978-3-319-59418-7
ER  -